1. Field of the Invention
The present invention relates to a interruption handling apparatus for a microcomputer with advanced flexibility.
2. Description of the Related Art
In recent years, advances in electronics and information processing have led to improvements in the efficiency of microprocessors, and to their widespread use in machinery and appliances.
Under the prior art, interruption handling apparatuses installed in information processing devices such as microprocessors have used a method changing the starting address of the processing program for every interruption factor, otherwise known as a vector interruption method.
Under the vector interruption method, along with the assignment of the specified vector to each interruption factor, a table which corresponds starting addresses of interruption processing programs to vectors is constructed.
When interruption occurs, after waiting for the completion of the instruction currently being executed, the interruption is received. The vector for distinguishing the interruption factor is generated, the starting address of the interruption processing program corresponding to the vector is retrieved from the above table, and then the necessary control of the branching from the address of the current execution to the starting address is performed. The starting address is controlled by hardware such as a microprogram. After branching to the starting address, the interruption processing program starts. Then, once the interruption processing program has been completed, the hardware control executes the control process returning to the original program address.
Under the vector interruption method, interruption processing programs are created for each interruption factor, and the interruption processing programs for each interruption factor are activated by the hardware control by setting the address at the head of every program as a starting address in the above table. Therefore, interruption processing programs are made use of in a variety of separate circumstances.
However, under the prior art, there has been the problem of having to increase the hardware scale, so that the processes from the occurrence of the interruption to the start of the interruption processing program, and from the end of the interruption program to the return to the original program, can be carried out by hardware.
Also, although there are many kinds of systems which feature built-in microcomputers, from large scale systems to small scale systems, there has been the problem that in terms of the properties of the system, there have been insufficient improvements in operational speed and there has not been the flexibility corresponding to the properties of the system. These problems are more specifically described below.
Firstly, when controlling a switching of tasks by means of an interruption process installed in an operating system, then before initializing the interruption processing programs corresponding to the various interruption factors, it is necessary to make all of the interruption starting addresses the same. That is to say, no matter what interruption occurs, once it has been branched to the interruption processing program in the operating system. In such a case, then for the vector interruption method, the benefits of being able to change the starting addresses for every interruption factor are in no way realized. By referring to the table, there has been the problem that the speed of the process from the occurrence of the interruption to the branching to the interruption processing program has been reduced.
Secondly, regarding the interruption response time from the occurrence of the interruption to the branch to the interruption processing program, even though the reading the starting address of the interruption processing program corresponding to the vector, which is stored in the table, and the branching to that address are said to be controlled by the control hardware, since a memory read operation equivalent to indirect memory addressing of the branch instruction is necessary, then processing speed cannot be further improved and a minimal necessary execution time remains. For systems where quick response to the occurrence of interruptions is necessary, there has been the problem that there can be occasions when the start of the interruption processing program is not sufficiently quick.
Thirdly, for interruptions which do not occur at the same time as instruction execution, such as external interruptions, since they have to wait until the instruction currently being executed is complete, there has been the problem that the activation of the interruption process is delayed.